Digital Systems Engineer (Associate Staff)
Date: Oct 13, 2024
Location: Lexington, MA, US
Company: MIT Lincoln Laboratory
The Advanced Lasercom Systems and Operations Group develops, builds, tests, and operates prototype laser communications systems for a variety of applications and environments. Lasercom offers dramatically increased data rates and enhanced physical security relative to microwave-based communications systems. The Group has expertise in communications; optics; electro-optics; optomechanics; optical turbulence mitigation; precise pointing control systems; embedded systems; digital and analog design; command, control, and telemetry; test set design and fabrication; data analysis; modeling; and simulation. The Group also runs and maintains the nation’s leading independent lasercom interoperability testing facility.
The Advanced Lasercom Systems and Operations Group seeks a full time Associate Staff member to oversee the digital design, layout, simulation, implementation, testing, and verification of hardware for high-speed optical communications systems and precision tracking systems. Most designs will be FGPA and PCB based, for flexibility, although ASIC designs may be preferred for certain projects. The candidate should be highly motivated and proactive, working closely with a small dynamic team, solving challenging problems with direct impact on National security.
The job function will involve:
- Collaborating with system engineers, optical engineers, and software developers, to jointly develop and implement high-speed digital signal processing and control systems supporting optical communications systems.
- Developing and driving project schedule in collaboration with management.
- Regularly interfacing with stakeholders to understand and influence requirements, and to anticipate the evolution of requirements over time. Presenting progress to stakeholders periodically.
- Regularly interfacing with FPGA vendors to push the performance envelope.
- Overseeing board bring-up activities, system level integration, verification, troubleshooting, and field testing.
Requirements:
- Minimum Bachelor of Science in Computer Engineering, Electrical Engineering, or similar discipline.
- Minimum 5 years in FPGA/ Digital Logic Design role, with at least three years of experience in at least two of the following:
- (1) implementing and testing custom RTL using VHDL,
- (2) PCB design, layout, bring-up,
- (3)embedded C/C++ and common scripting languages
- (4) signal integrity.
- Preference given to candidates with experience with the Mentor Graphics suite of tools.
- Experience with Xilinx Virtex FPGAs, preferably including UltraScale+.
- Prefer candidates with experience with high speed data links, high speed SERDES, and implementing modern memory architectures such as DDR4.
- Not required, but advantageous to have familiarity with communications networking protocols, such as Ethernet, Generic Framing Procedure (GFP), Optical Transport Network (OTN).
At MIT Lincoln Laboratory, our exceptional career opportunities include many outstanding benefits to help you stay healthy, feel supported, and enjoy a fulfilling work-life balance. Benefits offered to employees include:
- Comprehensive health, dental, and vision plans
- MIT-funded pension
- Matching 401K
- Paid leave (including vacation, sick, parental, military, etc.)
- Tuition reimbursement and continuing education programs
- Mentorship programs
- A range of work-life balance options
- ... and much more!
Please visit our Benefits page for more information. As an employee of MIT, you can also take advantage of other voluntary benefits, discounts and perks.
Selected candidate will be subject to a pre-employment background investigation and must be able to obtain and maintain a Secret level DoD security clearance.
MIT Lincoln Laboratory is an Equal Employment Opportunity (EEO) employer. All qualified applicants will receive consideration for employment and will not be discriminated against on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, age, veteran status, disability status, or genetic information; U.S. citizenship is required.
Requisition ID: 41274
Nearest Major Market: Boston
Job Segment:
Testing, Embedded, Facilities, Systems Engineer, Security Clearance, Technology, Operations, Engineering, Government
